目前，在较为混乱的解密市场中，随着加密的最新技术不断出现、芯片烧断数据脚、解密开盖过程中存在的漏酸的可能以及电路修改过程中误操作等，这些都有可能造成解密的失败；另外目前单片机的程序存储是靠内部电子作为介质来存储的，当芯片使用周期比较长或受到外部强磁场等环境的影响，也会导致解密失败。如果采用纯软件的方式破解，和母片的编程软件和编程方式甚至编程语言等有很大关系，也存在失败的概率。
　　但是，邦凯科技经过多年的研究，对AT89C51RE2解密等单片机的算法、架构和工艺进行了深入的研究，精心设计的解密技术流程在确保解密芯片绝对安全的同时，也把芯片解密的周期降到最低，极大的保证了客户在解密过程中的工程控制和经济效益。
　　有AT89C51RE2解密需求者请直接与我们联系：
　　芯片解密咨询热线：086-0755-83003639
　　E-mail：market2@pcblab.net
　　AT89C51RE2 is a high performance CMOS Flash version of the 80C51 CMOS single chip 8-bit microcontroller. It contains a 128 Kbytes Flash memory block for program.
　　The 128 Kbytes Flash memory can be programmed either in parallel mode or in serial mode with the ISP capability or with software. The programming voltage is internally generated from the standard VCC pin.
　　The AT89C51RE2 retains all features of the Atmel 80C52 with 256 bytes of internal RAM, a 10-source 4-level interrupt controller and three timer/counters.In addition, the AT89C51RE2 has a Programmable Counter Array, an XRAM of 8192 bytes, a Hardware Watchdog Timer, SPI and Keyboard, two serial channels that facilitates multiprocessor communication (EUART), a speed improvement mechanism (X2 mode) and an extended stack mode that allows the stack to be extended in the lower 256 bytes of XRAM.
　　The fully static design of the AT89C51RE2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data.
　　The AT89C51RE2 has 2 software-selectable modes of reduced activity and 8-bit clock prescaler for further reduction in power consumption. In the Idle mode the CPU is frozen while the peripherals and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative.
　　The added features of the AT89C51RE2 make it more powerful for applications that need pulse width modulation, high speed I/O and counting capabilities such as alarms, motor control, corded phones, smart card readers.
　　AT89C51RE2 特性
　　80C52 Compatible
　　– 8051 Instruction Compatible
　　– Six 8-bit I/O Ports (64 pins or 68 Pins Versions)
　　– Four 8-bit I/O Ports (44 Pins Version)
　　– Three 16-bit Timer/Counters
　　– 256 bytes Scratch Pad RAM
　　– 11 Interrupt Sources With 4 Priority Levels
　　ISP (In-System Programming) Using Standard VCC Power Supply
　　Integrated Power Monitor (POR/PFD) to Supervise Internal Power Supply
　　Boot ROM Contains Serial Loader for In-System Programming
　　High-speed Architecture
　　– In Standard Mode:
　　40 MHz (Vcc 2.7V to 5.5V, Both Internal and External Code Execution)
　　60 MHz (Vcc 4.5V to 5.5V and Internal Code Execution Only)
　　– In X2 Mode (6 Clocks/Machine Cycle)
　　20 MHz (Vcc 2.7V to 5.5V, Both Internal and External Code Execution)
　　30 MHz (Vcc 4.5V to 5.5V and Internal Code Execution Only)
　　128K bytes On-chip Flash Program/Data Memory
　　– 128 bytes Page Write with auto-erase
　　– 100k Write Cycles
　　On-chip 8192 bytes Expanded RAM (XRAM)
　　– Software Selectable Size (0, 256, 512, 768, 1024, 1792, 2048, 4096, 8192 bytes)
　　Dual Data Pointer
　　Extended stack pointer to 512 bytes
　　Variable Length MOVX for Slow RAM/Peripherals
　　Improved X2 Mode with Independant Selection for CPU and Each Peripheral
　　Keyboard Interrupt Interface on Port 1
　　SPI Interface (Master/Slave Mode)
　　8-bit Clock Prescaler
　　Programmable Counter Array with:
　　– High Speed Output
　　– Compare/Capture
　　– Pulse Width Modulator
　　– Watchdog Timer Capabilities
　　Asynchronous Port Reset
　　Two Full Duplex Enhanced UART with Dedicated Internal Baud Rate Generator
　　Low EMI (inhibit ALE)
　　Hardware Watchdog Timer (One-time Enabled with Reset-Out), Power-Off Flag
　　Power Control Modes: Idle Mode, Power-down Mode
　　Power Supply: 2.7V to 5.5V
　　Temperature Ranges: Industrial (-40 to +85°C)
　　Packages: PLCC44, VQFP44