这里我们提供对GMS77C1001芯片的基本性能特征介绍，因为在GMS77C1001解密等IC解密、单片机解密过程中，对单片机本身内部结构特征及加密性能有一定的了解，能够帮助客户更好的理解单片机解密技术，帮助解密工程师进行加解密特性分析以选择最合理的解密方案。
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　　GMS77C1001 Features
　　High-Performance RISC CPU:
　　- 12-bit wide instructions and 8-bit wide data path
　　- 22 single word instructions
　　- 0.5K/1K words on-chip program memory
　　- 25 bytes on-chip data memory
　　- Minimum instruction execution time 200ns @20MHz
　　- Operating speed: DC - 20 MHz clock input
　　- Seven special function hardware registers
　　- Two-level hardware stack
　　Peripheral Features:
　　- Twelve programmable I/O lines
　　- One 8-bit timer/counter with 8-bit programmable prescaler
　　- Power-On Reset (POR)
　　- Power Fail Detector : noise immunity circuit
　　2 level detect ( 3V, 2.5V )
　　- Internal Reset Timer (IRT)
　　- Watchdog Timer (WDT) with on-chip RC oscillator
　　- Programmable code-protection
　　- Power saving SLEEP mode
　　- Selectable oscillator options: Configuration word
　　RC: Low-cost RC oscillator (200KHz~4MHz)
　　XT: Standard crystal/resonator (455KHz~4MHz)
　　HF: High-speed crystal/resonator (4~20MHz)
　　LF: Power saving, low-frequency crystal/resonator
　　(32~200KHz)